The following is a conversation with Prof. Martijn Heck from the Eindhoven University of Technology on Dec 16, 2025. Here is a biography from his website:
Martijn Heck is professor in the Photonic Integration group of the Electrical Engineering department at Eindhoven University of Technology (TU/e). He is also still a part-time group leader at Aarhus University in Denmark, where he founded the Photonic Integrated Circuits group in 2013. Heck is a globally recognized and internationally oriented expert in photonic integration, with broad experience in ground-breaking basic research, applied research and technology transfer. He has specific interest in the application of this technology in sensors, microwave and terahertz photonics, quantum technology, and interconnects.
In his career, Heck has been deeply involved in the realization of the first successful multi-project wafer run of the European platform for photonic integration JePPIX, the development of the hybrid silicon platform technology, now commercialized by Intel and Juniper, from component level to full circuit level fabrication, and the invention of the ultra-low loss waveguide technology, with world-record low loss.
Heck has a strong background in photonic integration. As a generalist, his experience spans the whole chain of optical chip design, fabrication and characterization. He also has specialist expertise in ultrafast integrated laser technology and microwave photonics. Heck has worked with all the major photonic integration platforms: indium phosphide, silicon on insulator and silicon nitride photonic integrated circuits.
Here is a brief outline of our conversation:
InP Technology Trends And Heterogeneous Integration: The two big trends in InP are monolithic integration (combining lasers, modulators, and detectors on one chip) and heterogeneous integration (bonding InP onto silicon to get the best of both materials).
Wafer Size and Yield: Moving from 4-inch to 6-inch InP wafers enables use of mature silicon fab equipment, which actually improves uniformity and yield despite higher per-wafer costs.
Industry Ecosystem and Supply Chain: There is currently a bottleneck in procuring raw InP wafers, with China being a significant supplier, and the industry is still developing standardized yield definitions for open foundry processes.
Quantum Dot (QD) Laser Advantages: Quantum dot lasers offer two key benefits: better temperature stability for uncooled operation at 80C in data centers, and defect tolerance that enables direct growth on silicon.
Co-Packaged Optics (CPO): Uses of QD Lasers and Roadmap: CPO remains nascent with no volume production yet, as the industry is still debating optimal laser placement and copper interconnects continue to meet current needs.
Academia’s Role in Long-Term Technology Advancement: Academic research should target 100-1000x improvements in the 10-20 year horizon, balancing fundamental science with industrially relevant technologies rather than chasing single-metric breakthroughs.
Below: VS = Vikram Sekar, MH = Martijn Heck.
Introduction
VS: Hello. Thank you so much for doing this. One of the readers of my newsletter recommended you and said, “Hey, you should talk to him [Prof. Martijn Heck] about Indium Phosphide lasers.” So, that’s why I reached out.
MH: We should do a short introduction. We met through LinkedIn, right?
VS: Yes. I write a Substack publication called the Vik’s Newsletter. I basically write a lot about semiconductors and what’s in the semiconductor industry in a very technical sense, as that’s my background—I’m an engineer by training and profession. I look at stuff in depth, including RF, analog, memory, processors, optics, and power. I’ve been doing this for about two years now and am trying to expand my understanding and all my readers’ understanding of technical fields by reaching out to experts like yourself.
MH: For me, it’s very straightforward. I’m a professor in the Photonic Integration group here at TU Eindhoven in the Netherlands. We work on photonic integration but with a focus on the III-V compound semiconductors, specifically Indium Phosphide. The choice for III-V technology is because you need a different clean room for III-V than for silicon, and a university typically has only one clean room. I also used to work in Santa Barbara, UC Santa Barbara, on photonic integration, and in Denmark as a professor, also on photonic integration, but there I focused less on the technology and more on taking a fabless approach, working more on the circuit level and thinking about applications.
VS: Okay, awesome. That’s great. I have a bunch of questions, but feel free to deviate as much as you need to because you never know where the conversation goes.
InP Technology Trends And Heterogeneous Integration
VS: What’s interesting in the world of Indium Phosphide? What’s new? What’s the latest cutting edge that you’re looking at right now?
MH: The technology is rather old, but it’s the technology of choice for lasers in the telecom wavelength, which is why we work with it. We also work with photodiodes and modulators in this material. Overall, things are moving steadily forward. I think the trend is that we now have credible ways. There are two things new.
First of all, we have credible ways of actually going slowly towards the circuit level with companies like Smart Photonics, for example, who offer circuit-level technologies. That has always been a challenge because you know, if you are not worried about circuits, not worried about photonic integration, you can easily just make a layer stack that gives you the best laser or the best photo detector or the best modulator. The real challenge has always been monolithic integration—figuring out how to put everything together when you have conflicting requirements. That is what we call monolithic integration. We have been working for that already for 25 years, but slowly that is happening, and it becomes available for applications also outside of telecom. So that is slowly getting there, and in a way, that is new.
The thing that is really on everyone’s radar at the moment is the whole field of heterogeneous integration. This is rather new. When I was in Santa Barbara, we already started that with wafer bonding and die bonding—it was die bonding on silicon—so we basically try to bring this Indium Phosphide on silicon. This is for many reasons: you can work on 200 or 300 mm wafers; you can combine silicon photonics and Indium Phosphide; or you can combine silicon-based electronics and Indium Phosphide. For the last few years, the really hot topic is heterogeneous integration.
MH: Heterogeneous integration means a little bit of different things for electronics and for photonics, but there’s overlap. For electronics, we talk about chiplets, the two-and-a-half 3D integration. For photonics, we historically use the word heterogeneous integration also to think about how we can bring different materials that are not lattice matched, like InP and silicon, together. We have techniques for that, including chiplets, flip chipping, wafer and die bonding, and micro transfer printing.
VS: I think it’s interesting to understand why we have to do all this heterogeneous integration to begin with. We can’t make lasers on silicon because it is an indirect bandgap material. When the electrons go from the conduction band to the valence band, they don’t emit light unless they also have something called a phonon that adjusts for momentum. So, simply, unfortunately, silicon cannot make lasers, at least not effectively enough the way we want it to. That’s why you need these materials, and the best way to put it on silicon is to make it in a direct bandgap material and then put it onto silicon. So you get the best of both worlds, right?
MH: Yeah. Silicon is a great technology, by the way. It’s not a great material. The best transistors also are made in III-V compound semiconductors, not in silicon.
InP Wafer Size and Yield
VS: Yes, the news cycles are always filled with the 2 nanometer node, but there are so many applications—lasers being one, high power RF, all of these III-V semiconductors like Gallium Nitride, Gallium Arsenide, even power conversion—there are no substitutes to these materials. So it has its unique uses. Indium Phosphide has its roots in the telecom industry, but right now, I think people have started using Indium Phosphide lasers for all kinds of data center-based applications, and it’s suddenly come into popularity again. But historically, I think these wafers have always been 3-inch or 4-inch. Why exactly is that?
MH: Many reasons. The material is relatively expensive and also relatively brittle. If you drop a silicon wafer, it survives, but Indium Phosphide just shatters. That is one reason for the small size. The other reason is the volumes. A laser is a few hundred micrometers in length, maybe two or three hundred micrometers in width, which is more than enough. You can get tens of thousands, maybe up to 100 thousands, of lasers per wafer.
VS: That is a lot, but seemingly not enough these days. That’s why you see companies like Coherent talking about moving to 6-inch wafers because that automatically gives double the number of chips per wafer and can significantly increase capacity.
MH: Yes, there are many reasons for doing this 6-inch size. Here in TU Eindhoven, we are building a 6-inch plant/fab done by TNO, the Dutch research institute, for industry—so companies like Smart Photonics are interested.
First of all, for one wafer, you get indeed double the number of dice. That is true because you go from four to six inches, that’s one and a half times squared, which is 2.25 times the area. On top of that, typically the edge you have to discount is also less, so that is good.
But also, there are two technical advantages. One technical advantage is that if you go to larger wafer sizes, then you can move slowly more towards the mature equipment because you can use the equipment that is normally developed for silicon. We have an ASML scanner here in the academic lab. All the tooling out there is developed for silicon because 99% of the market is silicon, right? You want those kinds of tooling, but that tooling is typically 8-inch or 12-inch, but definitely not 4-inch. So, you get better tooling. The end result is also more uniformity, so in the end, your yield goes up.
VS: So the bigger wafers are more uniform. Going to bigger wafers is actually a yield benefit in terms of Indium Phosphide?
MH: Typically, it is, yes, because of the tooling—more mature tooling and processes.
VS: I see. Since silicon wafers have been running on 12-inch for a while, and before that 8-inch and 6-inch, we have a lot of legacy equipment from the 90s that could be used for Indium Phosphide. Since 99% of the industry is silicon, we have a lot of these things lying around, so there’s a lot of benefit going to larger wafer sizes for III-V in a sense.
MH: Well, it’s far more expensive. It’s a trade-off, right? You need all new fab—not the physical fab, but all the tooling—because you want to benefit from that.
VS: So the wafers themselves being expensive, but are the yields in Indium Phosphide reasonably high, or is this a concern?
MH: This is a very tricky question because it depends on the application. If you go to an Indium Phosphide fab, you come with a new idea and you’re going to develop that, your yield is shit, and that’s because people have not been running the process. Why is the yield high of a TSMC process? Because they run only one process.
VS: So let’s take an example of Indium Phosphide for telecom applications, which is as commercial as you can imagine a compound semiconductor to be. What do those wafers run at? Those should be mature, right? They should be running at high volume and high yield.
MH: The question is what you want out of it. The definition of yield for a fab is different than the definition of yield for an application. This is an issue that never comes up because most people are vertically integrated or they have their own process running in a fab. So they don’t care about a fab yield versus the design yield because they integrate everything in a business model and they don’t give you the data. If you decouple that—if you have fabs like Smart Photonics and end users doing something with an open process—then it becomes an issue.
TSMC doesn’t define yield on whether your final product works. If you designed an RF transceiver like a 100GHz radar system for a car and it doesn’t work, you can’t go back to TSMC. TSMC says, “Our process control modules show that our metal has this thickness and this resistivity. Our doping is there because it has this resistivity. Our lines are okay. Our critical defect is one part per million, per billion. We did our job. If your transceiver doesn’t work, that’s your problem.”
VS: This is basically like process yield versus parametric yield. You can make a transistor that meets certain electrical specifications. And each foundry, like TSMC, has some specific test structures they put on every wafer. And if it passes that, that wafer is now yours, you have to pay for it. On the other side, you’ve got the example of Intel’s famous process of binning transistors based on performance, so that’s a different thing. Like they build a CPU, but what performance comes out of the CPU is not really TSMC’s problem now.
In the same sense, if there’s a pure-play foundry like Smart Photonics making Indium Phosphide lasers, they should have a set of criteria that they go by, right?
MH: Yes. We are still growing up, so we have to figure that out. I don’t agree with how they do it now because they are too much towards what they call the “building blocks.” They basically define a modulator but don’t give you the more basic data. I think that it’s not a sustainable model. Smart Photonics comes from our group; the CTO is a part-time professor here. So we have an active discussion about these things, but I think we should shape that a little bit better. As a university running the JePPIX platform—the European platform for photonic integrated circuits—we are supposed to have a vision on how the ecosystem should develop. We sit together with all these fabs, designers, design houses, end users, and software teams. We are quite well embedded; literally, we set up a large part of the ecosystem.
Industry Ecosystem and Supply Chain
VS: Who are the premier suppliers of Indium Phosphide raw wafers for the fab, especially considering the pure-play foundry aspect?
MH: I don’t know who the suppliers of the wafers are. I know it’s a bottleneck now. I think somewhere China is definitely a big supplier. It’s a really big bottleneck. Some fabs have problems procuring the material. It’s also shit [laughs] because we cannot buy wafers easily.
VS: So that has a lot of implications because everybody wants Indium Phosphide lasers and you can’t find wafers for them. My impression is the industry is output restricted because you have a 4-inch wafer and you can’t get as many as you can get out of an 8-inch wafer and then you’re limited by how many wafers you can run through a fab. But it’s more interesting that there is an Indium Phosphide wafer shortage supply.
MH: That is true. It’s not that we need a lot, but I think there’s a bottleneck. I don’t know what the reasons were to be honest. I’m not in charge of buying here, but I do know we have problems procuring wafers at the moment.
VS: I’ll ask you one more process question. What is the largest reticle size you can make on a 4-inch Indium Phosphide wafer?
MH: We use an ASML scanner, so whatever ASML has on offer. That’s typically the 2.5 cm by 2.5 cm or by 3 cm. There’s no difference with silicon.
VS: It’s driven by th e same limitations of silicon lines because you use the same technology, right?
MH: I’m not sure if it’s limitation. I mean, it’s a few, a few centimeters, right?
VS: I was only saying limitation because I’m used to the word limitation in the world of CMOS, where GPUs are limited by reticle sizes. They occupy the entire field of view possible by a single scan. In the silicon world, that is a problem when they make these large GPUs, but in the world of RF, analog, and III-Vs, it’s really not because things are actually much smaller. So that’s a good distinction to make.
MH: I’m not sure. When you look at companies like Infinera, which is bought by Nokia, they have pretty large die sizes. They have these terabit-per-second coherent transmitters with hundreds of components integrated. A lot of these components are hundreds of micrometers, maybe running even into the millimeter, so they might start to hit the square centimeter level.
There’s actually somewhere a YouTube movie that someone bought an Infinera chip or module and is disassembling it. I mean, not just some one. It’s one of those persons who has access to an extremely nice microscope. So this is very insightful actually. A lot of probably confidential information is now being disclosed there.
VS: Fancy. I should check this out. I’m going to find this and see if I can put it up somewhere. I’ll share this link. Yeah, it’s fancy. Looking at optic stuff through a microscope is amazing, actually. There are a lot of beautiful features—like the gold in there and the optical fiber and how they couple—it’s actually pretty beautiful through a microscope.
Note from VS: Here is the video.
Quantum Dot (QD) Laser Advantages
VS: You mentioned heterogeneous integration on silicon of Indium Phosphide earlier. What about quantum dot lasers? Maybe before we explain their potential use in the future, we should explain what a quantum dot is.
MH: What do you know about quantum dot lasers? You know about details or not yet?
VS: Let’s just say no. I have a very basic understanding.
MH: Did you do semiconductor physics courses in the past?
VS: Yes.
MH: Quantum dots are based on the Schrödinger equation—it’s actually the textbook example of that. We make active material in lasers, which is basically a semiconductor with a conduction and valence band. We inject current, and the electrons and holes recombine to create gain. In most telecom lasers, we use quantum wells, meaning we make the layers very thin. That means we start in one dimension to quantize the energy states because we start squeezing the material tighter than the electron wavelength. That is where Schrödinger’s equation comes into play.
With quantum wells, we make it very thin, change a little bit on the density of states, and can tailor the gain spectrum. With quantum dots, we basically make a point-like structure. In all three dimensions, we have now confined electrons, so we have complete control of the electronic states, the energy levels—in theory.
In practice, not, because quantum dots are all over the place. They have all kind of different sizes. You can say, “Okay, I want exactly that state,” but the next dot has it here, the next dot there. In the end, it averages out, and instead of more control, you even get less control because all these quantum dots grow spontaneously. In a crystal, you grow a material that is not exactly matched.
Think about if you buy bad Lego blocks. Quite often, you can put the very small bricks on top of real Lego. But the larger the brick, the higher the fit tolerance becomes. For two dots in Lego, you can press a little bit to make it fit. But if you have a lot of them, I mean, this one and this one (holds up two fingers) are absolutely speaking far off.
So how do you make quantum dots?
You grow your actual wafer, and then you grow a material that doesn’t fit. And because it doesn’t fit, you don’t get a nice layer. The same thing that, on a window you get droplets of water. Because the forces that bring the water together are higher than the forces that wanna spread it out. So you get small droplets, and that’s a very natural way of making these dots. But the point is it’s spontaneous, so they all have different sizes, so it’s all over the place.
Can we tailor the gain spectrum? No, not really. This old promise of why quantum dots are interesting is a little bit gone.
However, what makes it interesting nowadays—mainly two things—is that the electrons are very much confined, unlike in a quantum well where the electrons float around and can diffuse everywhere. In a quantum dot, they are locked. That has two advantages that we utilize and that become very important now:
1. Far more temperature stable
At room temperature, are quantum dots the best lasers? Not necessarily, but at 80° C, where the data centers operate, quantum dots still perform well. For quantum wells and other materials, it is harder to do that. Their performance over the whole range where they need to operate is better. In the past, we could circumvent that by putting in a Thermo-Electric Cooler (TEC), or a Peltier element. We can do that for telecom because no one cares about energy efficiency—it’s all about spectral efficiency. If you send something from Amsterdam to New York you have to make a cable into the Atlantic Ocean. So the energy efficiency of the bits, who cares? Unfortunately.
But in data centers, it’s a different story. Spectral efficiency is not so much of a problem because we don’t have to send 10s of TBs to an optical fiber, we just send a few hundred gigabit to an optical fiber. We just put, you know, a lot of optical fibers there. We cannot do that under the Atlantic, but we can easily do that in a data center. I mean, the whole back plane is optics,
There, it’s about energy efficiency. That means we don’t want to cool the chips and we don’t want to cool the lasers. So we want uncooled lasers, and uncooled lasers mean that in an environment of 80° C, your laser should still work, and then quantum dots come into play.
2. Can be grown on Silicon
You can see that in new companies like Quintesscent—quantum dots you can grow on silicon. So instead of doing these heterogeneous integration efforts like wafer bonding, die bonding, etc., you can grow quantum dots on silicon. You cannot really grow it because it’s not a nice match, so you have a lot of defects. A defect normally is killing because it’s like having a bathtub for the carriers (electrons and holes). If you punch a hole in it, it drains. A laser is like a bathtub because carriers can go everywhere.
But quantum dots is different. Think about taking all these little plastic cups, putting them in a bathtub, and then filling it with water. If you have a defect, you put a hole in one of the plastic cups, but all the other plastic cups still hold their water, right? So, you can kill one quantum dot, but you have lots of quantum dots. It’s far more tolerant against defects.
With Gallium Arsenide-based quantum dots, you can grow that on silicon. And the cool part of that is, if you squeeze the volume of quantum dots, your energy levels change, and you have more control of your energy level. That means Gallium Arsenide lasers, which are normally not so useful for the telecom wavelengths, with quantum dots they are starting to enter the 1300 nm band (O-Band). You can get it to work at 1310. The O-band, not the C-band.
VS: Great. I was going to ask you about whether you engineer the wavelengths in quantum dots, but it seems like you can get it to work at 1300 nm.
MH: GaAs quantum dots you can get it to work at 1310 nm - the O-band, not the C-band, but the O-band.
Co-Packaged Optics: Uses of QD Lasers and Roadmap
VS: That’s very good to know because that’s where all of this data center stuff is definitely being used. I had one other application: the way you describe quantum dots makes it a perfect fit for something like co-packaged optics (CPO). They don’t want to put typical Indium Phosphide DFB (Distributed Feedback) lasers inside a CPO switch, which has a giant piece of silicon burning hundreds of watts of power, because they are not inherently temperature stable lasers. Quantum dots overcome that downside—the laser can operate right next to a hot switch running there. So that makes it a perfectly suited technology for co packaged optics, which is a way that everybody wants to save power in data centers now. And the fact that you can grow it directly on silicon makes it even more interesting.
MH: Yeah, but that’s what some companies do. Quintesscent is a spin-off from the UC Santa Barbara group that I used to be in. You have to keep in mind that a lot of people don’t want the laser necessarily inside the CPO; you can also just keep them out of the system. I think a lot of companies, like Ayar Labs, just have a laser engine a little bit to the side so they don’t suffer so much.
Also, don’t forget a company like Intel—they have mastered the quantum wells to the level that they can also just run it - it’s not that it’s not possible. They can also run at elevated temperatures without quantum dots.
VS: Indium Phosphide lasers? Oh, okay. But still, the industry does not prefer putting lasers next to it. Is it a reliability thing? Are these lasers going to fail eventually?
MH: The industry is still figuring that out. There is no industry at the moment—no one is using CPO in volume, right?
VS: Right. Very nascent. We have a few products coming out, but it’s not widespread for sure.
MH: People are still figuring out where the laser should be. People have already been discussing that for 20 years, and it changes all the time. But keep in mind, Intel can make the lasers right on top of the silicon. That is their proprietary effort. OpenLight, working with Tower [Semiconductor], they make the laser right on top of the silicon. There are ways of doing that.
Some others say, “Okay, we just take the silicon as is, and we have an external laser source.” Global Foundries have little recesses they make in their silicon so that you can flip-chip a laser in it. They facilitate that. I don’t think they will claim this is the best solution. They just say, “Our customers want this, so we do it.” Again, we go back to the fab is not responsible for that product.
People are figuring that out at the moment. There’s a French company called NCodiN, and they just say, “Let’s make the whole co-package optics fully in Indium Phosphide with little directly modulated lasers. Let’s get rid of all the modulators. We model the laser directly.” Everything is sort of in flux at the moment, and the fact is nobody is actually selling in volume co-packaged optics. Nvidia is even saying, “We have it, we have a demonstrator, we have the whole ecosystem” ... they bought Mellanox a few years ago right? But for the moment, copper still does the job. We have it, we keep developing it, but as long as we can squeeze out copper, we will squeeze out copper, which makes a lot of sense.
VS: Yeah. Copper when you can and optics when you must.
VS: That’s interesting. Do you have any idea when people might get more onto this co-packaged optics thing? Do you have any sense of how this is going? Or maybe we’ll just stay in copper for the next five years and not even care about optics. Is that a possibility?
MH: Well, if it would happen in five years, that would be not too bad. It might happen a little bit sooner maybe. If the AI bubble is continuing a little bit more, of course, the demand is there. Sooner or later, this will happen, but I think it will be very careful at first. Co-packaged optics at first will start realizing, “Okay, let’s only use it for the chips that are the furthest away.” I think it will be quite gradual, as it has been all the time. It’s moving forward steadily.
Academia’s Role in Long-Term Technology Advancement
MH: That’s why your opening question asked what is new. Scientifically, there are a lot of new things, but things are moving very slowly in introducing new technologies. That sounds conservative, but it isn’t, because we are talking about a technology—computing and communication—that is the most advanced technology in the world; nothing comes even close to this. It grows at an unprecedented speed of a factor of two every two years. If you very slowly catch up to that, it means you are the very, very best, because that means you have been growing super exponentially.
If we can catch up to the best technology in the world where the whole world is working together—where ASML in the Netherlands and TSMC in Taiwan and Nvidia in the US are working together to set pace, including a lot of other unique suppliers—and if you can squeeze in there, then even three decades is relatively fast.
We have a Nobel Prize for graphene—where’s graphene? It is not delivering at all whatsoever. It’s still silicon, and the only other technologies next to silicon that are being considered are still III-Vs. III-Vs are already around for a long time. Our group 20 or 25 years ago was doing III-V electronics, and we stopped it because it was boring, been there, done that. People have been doing it for such a long time. [laughs]
We have to keep that in mind. Especially in academia, we don’t have that mindset, and that’s a bit of a problem for Europe. In the US and in Asia, there are the big companies, so they make people aware that this space, these time scales, this technology, is important. In Europe, we don’t have that. Because of that, I think we do the wrong kind of research. We do a lot of research on graphene, but no one knows how to make a transistor. We talk about manufacturing back in Europe, but there’s literally no one in Europe who understands a transistor. We have had a job opening for a professor to make InP transistors for three years. Over all those years, we got one good applicant, and that person eventually decided not to come. And that person had a job at a big American Semicon firm, and he got a job offer from another one. Eventually, he decided not to come. The expertise is not there. If I want to have a professor in graphene, I get 20-30 applicants who have a Nature paper, but it’s not a technology; it doesn’t exist in the real world.
VS: So, it’s a balance of how you can find people who would work on relatively mature but useful technologies versus fancy but not in manufacturing or have any reasonably short time frame practical use. It’s like you have two different balancing constraints.
MH: When I was in the US, in UC Santa Barbara, they had excellent professors. They knew what was still academically interesting, but if they would succeed with their projects, they would be able to start a tech transfer to the industry. So, it was still academically very interesting but also industrially relevant—not so industrially relevant that the companies would do it themselves, but adequately ahead of the curve.
You can calculate that. We’re part of the field of Moore’s Law—a factor of two every two years. That means a factor of 30 in 10 years, a factor of a thousand in 20 years. Companies are looking ahead five, six, seven years with their product development. If I work on a factor of two, four, five, six, or even ten improvement, I’m probably behind the curve because by the time I get it funded and my PhD has been doing their work, we’re already five, six, seven years further, and then the companies have that as a product on the market.
So, what should I aim for? Definitely, if you don’t aim as academics for a factor of 100, you’re out of the game. Maybe a factor of 100 to a thousand. But here’s the real challenge: every Nature paper tells you, “I’m a factor of a thousand times better.” But they do that on one subset. They make the fastest possible transistors. I’ve seen Nature papers: “We make terahertz transistors and we’re going to change computing fundamentally, radically.” But terahertz transistors already exist for 20 years; we can make them. We can also clock silicon at 50 gigahertz, but we don’t do that because it’s not efficient, and we burn the processors.
So, they are living in their dream world, and they only look at one metric. What is really important is to have an idea where the technology is going. The technology typically changes very slowly, so you have to adapt to the existing technology. Ten years from now, there will not be a radical change. Maybe those co-packaged optics are there, but then it’s done with chiplets and 2D/3D integration that already exists. The only thing you’re going to integrate then is a silicon photonics die. But the photonics die is the same as a silicon electronics dye. There are copper contacts, aluminum, copper, whatever. You flip, dip it. The techniques are the same. Everything’s the same. From an academic perspective, people say that is incremental. Obviously, it isn’t. Obviously, it’s a radical change because all of a sudden, we have fibers coming out of the processors and the memory. That is the challenge we have to face.
VS: What is your view on how far out technologies one should be working on that will become relevant for a useful application in the future? Because sometimes, you know, you don’t know if they’re relevant until you, it shows up, you can’t really tell. What is in your opinion a good direction one should follow?
MH: First of all, all technologies are different. We talk now about the most advanced technology in the world. On the technology side (on the chip design side, it’s a different story), academia should not work on anything closer than 10 years or further away than 20 years. Basically, in the 30 to a thousand times better range.
Academia should also work on graphene and boron nitride and all kinds of new ideas. I’m not saying we should not do that, but we should also work on the more realistic kind of technologies. We should not start saying massively, “Okay, Nature, Science, is all leading.” No, we should have a balance there. That is my plea: not to stop the fundamental research but do not have the fundamental research dominating the narrative. That is the point in Europe. In other continents, they have done a better job, in my opinion, in that respect.
You cannot work too far ahead. It’s about assessing what you can do in a scientific project. If you’re done with a scientific project, would I be ahead of the curve, behind the curve, or too much ahead of the curve?
VS: You have to time it right. If you don’t time it right, it becomes useless. Either it is trivial or it is far-out science fiction. So, there’s an intermediate balance to draw in academia there, right?
MH: That varies from field. Physicists have a different trade-off than electrical engineers, and industrial designers have a different trade-off—they want something that works immediately. That’s okay, but we should recognize that those things are different.
Closing Remarks
VS: What is the one optics-related technology that, if you see it in a journal, you will immediately turn to it and read today?
MH: Depends on the title, my own expertise is lasers, InP lasers. If people do something fun with a laser, something new with a laser, that definitely catches my attention.
VS: Well, that’s pretty much all I have in terms of questions. We covered a lot of topics. I have a much better lay of the land of optics now, especially related to the process stuff we talked about. Some of this information isn’t easily available unless you talk to the people who work on it or have an intimate understanding of the directions in academia and industry together. So that’s why this was such a useful chat, at least for me, and I hope that the people who will read/watch this will find it useful too. I have a kind of small but growing YouTube channel. I might put it up there. My Substack is where most of my audience is, so maybe about 10,000 people might see it. I’ll probably transcribe this interview as well.
MH: You can always find me on LinkedIn. If you post it there and you tag me, I can share the link.
VS: Awesome. Great talking to you. Thank you so much for your time. You must be really busy, but thanks for sitting down to explain this whole thing to me.
MH: Thank you for this interview. And again, uh. Send me an email or I send me a message on LinkedIn and if you have it linked somewhere, then, I can spread it. I don’t have a big following, but I have quite technical following,
VS: Yeah, that’s important. I think I want to bring the more technical people to the broader people, but I have a broad audience and people have these questions, but they don’t know how to get them answered, so I’m kind of an intermediary, a data exchanger of sorts. Yeah. Alright, thank you so much. I’ll keep you posted on any material that comes out of this.
